TSMC, together with the National Taiwan University and Massachusetts Institute of Technology, announced today that significant progress has been made in chips below 1nm, and the research results have been published in Nature.
The study found that the use of semi-metal bismuth Bi as the contact electrode of the two-dimensional material can greatly reduce the resistance and increase the current, and achieve energy efficiency close to the quantum limit, which is expected to challenge chips with processes below 1nm.
According to reports, the discovery was first discovered by the MIT team, and then TSMC optimized the “easy deposition process”, and the team of Professor Wu Zhiyi of the Department of Electrical Engineering and Optoelectronics of National Taiwan University successfully reduced the component channel through the helium ion beam lithography system.
IBM has first released a 2nm process chip in early May. Compared with the current mainstream 7nm chip, the performance of the IBM 2nm chip is expected to increase by 45% and the energy consumption is reduced by 75%.
However, industry insiders said that because IBM does not have a wafer fab for advanced logic process chips, its 2nm process cannot be implemented quickly, and it is more difficult to “overtake on a curve”.